Power conversion systems convert electrical power from one form to another and may be employed in a variety of applications such as motor drives for powering an electric motor using power from an input source. Switching converters include electrical switches actuated in a controlled fashion to selectively convert input power to output power of a desired form such as single or multi-phase AC of a controlled amplitude, frequency and phase to drive an AC motor according to a desired speed and/or torque profile and to provide regulation to accommodate varying load conditions. AC motor drives generally provide a controlled AC output via an inverter that converts DC to AC using an array of high-voltage, high-speed semiconductor-based switching devices. The inverter switches are actuated through various forms of pulse width modulation (PWM), with the timing of the array switching determining the power conversion performance to convert power from a DC bus to variable frequency, variable amplitude single or multi-phase AC output power. The PWM switching states used in the inverter are often modeled in terms of a space vector diagram that includes zero vectors at a diagram origin and non-zero (active) vectors, where such control is sometimes referred to as space vector modulation (SVM) or space vector pulse width modulation (SVPWM). SVPWM at low modulation index, however, can generate high common mode (CM) currents due to very small active vector dwell time, resulting in near simultaneous switching on all three phases, leading to large spikes in the bus voltage with respect to system ground, which can adversely impact various components of the drive such as printed circuit boards, magnetic components (e.g. power supply transformers) and power devices, and to drive issues like deceleration inhibit due to bus pump-up. Previous techniques for addressing such common mode issues include the use of common mode capacitors from DC bus to a solid system ground reference to hold that voltage down and also to prevent pump up of the DC bus, but this approach cannot be used in high resistive ground (HRG) systems or in floating systems where the power source is not solidly referenced to ground. Drive output filters can address the adverse effects of common mode currents but these are bulky and expensive.
U.S. Pat. No. 7,034,501 to Thunes et al., issued Apr. 25, 2006 and assigned to the assignee of the present application describes spacing modulating signals at low speed to prevent overvoltages through reflected waves in a current regulated drive, in which volt-second distortion is compensated by the current regulator. The entirety of this patent is hereby incorporated by reference as if fully set forth herein.
U.S. Pat. No. 7,164,254 to Kerkman et al., issued Jan. 16, 2007 and also assigned to the assignee of the present application discloses common mode voltage reduction techniques in which the switching sequence is modified to avoid using the zero vectors so as to reduce common mode voltages in the motor. The entirety of this patent is hereby incorporated by reference as if fully set forth Herein.
U.S. Pat. No. 7,106,025 to Yin et al., issued Sep. 12, 2006 and assigned to the assignee of the present application discloses techniques for canceling dead time effects in the algorithm to reduce common mode voltages produced by a three-phase power conversion device in a rectifier/inverter variable frequency drive (VFD), the entirety of which is hereby incorporated by reference as if fully set forth herein.
U.S. Pat. No. 6,819,070 to Kerkman et al., issued Nov. 16, 2004 and assigned to the assignee of the present application discloses inverter switching control techniques to control reflected voltages in AC motor drives, the entirety of which is hereby incorporated by reference as if fully set forth herein.
U.S. Pat. No. 7,034,501 to Thunes et al., issued Apr. 25, 2007 and assigned to the assignee of the present application discloses gate pulse time interval adjustment techniques for mitigating reflected waves in AC motor drives, the entirety of which is hereby incorporated by reference as if fully set forth herein.
Co-Pending U.S. patent application Ser. Nos. 12/394,613, filed Feb. 27, 2009, and 12/429,309, filed Apr. 24, 2009, both assigned to the assignee of the present application, both of which are hereby incorporated by reference as if fully set forth herein, disclose controlling common mode voltages in AC motor loads using switching sequences with only active vectors, but this can increase output current distortion, particularly at low speeds and the method may not be easily implemented in all PWM waveform generators.